IC-Bausteine

DIP-Bauform

Eine Übersicht über die gängigen IC-Typen. IC integrated circuit (integrierter Schaltkreis)

7400er Familie

Baureihen

• TTL (Transistor Transistor Logic, Logik auf Transistorbasis)
  • 74 = TTL (veraltet)
  • 74H = Highspeed TTL (veraltet)
  • 74ALS = Advanced Low Power Schottky TTL
  • 74AS = Advanced Schottky TTL
  • 74F = Fast TTL
  • 74L = Low Power TTL (veraltet)
  • 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)
  • 74S = Schottky TTL

• CMOS (Complementary Metal Oxide Semiconductor, Halbleiter mit gegensätzlicher Polarität)
  • 74AC = Advanced CMOS
  • 74ACT = AC mit TTL-kompatiblen Eingängen
  • 74HC = High Speed CMOS
  • 74HCT = HC mit TTL-kompatiblen Eingängen
  • 74AHC = Advanced High-Speed CMOS
  • 74AHCT = AHC mit TTL-kompatiblen Eingängen
  • 74VHC = Very High Speed CMOS
  • 74VHCT = VHC mit TTL-kompatiblen Eingängen
  • 74LV = Low-Voltage CMOS

• ECL (Emitter Coupled Logic, Emittergekoppelte Logik)
  • 74ECL
  • 74ECTL

• Langsame störsichere Logik
  • 74LSL
  • 74SZL

• BICMOS Bus-Interface-Logik (CMOS und Bipolartechnik kombiniert)
  • 74BCT
  • 74ABT

Typen

Name	Pins	Anzahl	Logische Funktion
7400	14	4	2 Input NAND
7401	14	4	2 Input NAND (OC=Open Collector)
7402	14	4	2 Input NOR
7403	14	4	2 Input NAND (OC) Andere Belegung als 7401
7404	14	6	Inverter
7405	14	6	Inverter (OC)
7406	14	6	Inverter Buffer/Treiber (OC)
7407	14	6	Buffer/Treiber (OC)
7408	14	4	2 Input AND
7409	14	4	2 Input AND (OC)
7410	14	3	3 Input NAND
7411	14	3	3 Input AND
7412	14	3	3 Input NAND (OC)
7413	14	2	4 Input NAND Schmitt-Trigger
7414	14	6	Inverter Schmitt-Trigger
7415	14	3	3 Input AND (OC)
7416	14	6	Inverter Treiber (OC)
7417	14	6	Treiber (OC)
7418	14	2	4 Input NAND Schmitt-Trigger
7419	14	6	Inverter Schmitt-Trigger
7420	14	2	4 Input NAND
7421	14	2	4 Input AND
7422	14	2	4 Input NAND (OC)
7424	14	4	2 Input NAND Schmitt-Trigger
7425	14	2	4 Input NOR
7426	14	4	2 Input NAND (OC)
7427	14	3	3 Input NOR
7428	14	4	2 Input NOR
7430	14	1	8 Input NAND
7431	16	-	Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)
7432	14	4	2 Input OR
7433	14	4	2 Input NOR (OC)
7434	14	6	Treiber
7435	14	6	Treiber (OC)
7436	14	4	2 Input NOR
7437	14	4	2 Input NAND
7438	14	4	2 Input NAND (OC)
7439	14	4	2 Input NAND Treiber (OC)
7440	14	2	4 Input NAND
7441	16	-	BCD -> Decimal Decoder (OC)
7442	16	-	BCD -> Decimal Decoder
7443	16	-	Excess-3 -> Decimal Decoder
7444	16	-	Excess-3-Gray -> Decimal Decoder
7445	16	-	BCD -> Decimal Decoder (OC)
7446	16	-	BCD -> 7-Segment Decoder (OC)
7447	16	-	BCD -> 7-Segment Decoder (OC)
7448	16	-	BCD -> 7-Segment Decoder (OC)
7449	14	-	BCD -> 7-Segment Decoder (OC)
7450	14	-	Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)
7451	14	2	AND-OR-INVERT
7452	14	?	Expandable AND-OR
7453	14	1	Expandable 4-Wide AND-OR-INVERT
7454	14	1	3-2-2-3 Input AND-OR-INVERT
7455	14	1	2-Wide 4-Input AND-OR-INVERT
7473	14	2	JK Flip Flop with clear
7474	14	2	D Flip Flop with preset & clear
7475	16	-	4-Bit Bistable Latch
7476	14	2	JK Flip Flop with preset & clear
7478	14	2	JK Flip Flop
7486	14	4	2 Input XOR
7490	14	-	Decade Counter
7492	14	-	Divide By-Twelve Couter
7493	14	-	4-Bit Binary Counter
7495	14	-	4 Bit Parallel Access Shift Register
74121	14	-	Monostable Multivibrator With Schmitt-Trigger
74122	14	-	Retriggerable Monostable Multivibrator
74123	16	2	Retriggerable Monostable Multivibrator
74125	14	4	Tri-State Buffer
74126	14	4	Tri-State Buffer
74132	14	4	2 Input NAND Schmitt-Trigger
74133	14	1	13 Input NAND
74136	14	4	2 Input XOR
74137	16	1	3-to-8 line decoder / demultiplexer with address latches, low-active outputs
74138	16	1	3-to-8 line decoder / demultiplexer , low-active outputs
74139	16	2	2-to-4 line decoder / demultiplexer , low-active outputs
74146	16	-	BCD -> Decimal Decoder (OC)
74147	16	-	10-Line -> 4-Line BCD Priority Encoder
74148	16	-	8-Line -> 3-Line Priority Encoder
74151	16	1	8:1 Multiplexer
74154	24	1	4-Line -> 16-Line Decoder/Demultiplexer
74155	16	2	2-Line -> 4-Line Decoder/Demultiplexer
74156	16	2	2-Line -> 4-Line Decoder/Demultiplexer (OC)
74157	16	4	2:1 Multiplexer
74158	16	4	2:1 Multiplexer , inverted outputs
74161	16	-	Sync 4 Bit Binary Counter Async Reset
74164	14	-	8 Bit Serial Shift Register
74177	14	-	Presetable Binary Counter/Latch
74191	16	-	4-Bit Up/Down Binary Converter
74193	16	-	4-Bit Up/Down Binary Counter
74221	16	2	Monostable Multivibrator with Reset
74238	16	1	3-to-8 line decoder / demultiplexer , high-active outputs
74239	16	2	2-to-4 line decoder / demultiplexer , high-active outputs
74240	20	-	8-Bit Tri-State Buffer/Line Driver (invertierend)
74241	20	-	8-Bit Tri-State Buffer/Line Driver
74242	14	-	4-Bit Bus Transceiver (invertierend)
74243	14	-	4-Bit Bus Transceiver (nicht invertierend)
74244	20	-	8-Bit Tri-State Buffer/Line Driver (nicht invertierend)
74245	20	-	8-Bit Bus Transceiver
74251	16	-	8-Bit Input Multiplexer; 3-State
74259	16	-	8-Bit Adressable Latch
74260	14	2	5 Input NOR
74266	14	4	2 Input Exclusive NOR (OC)
74366	16	6	Tri-State Inverting Buffer
74367	16	6	Tri-State Buffer
74373	20	-	8-Bit Transparent Latch
74541	20	-	8-Bit Tri-State Buffer/Line Driver
74573	20	-	8-Bit Tri-State D-Type Latch
74574	20	8	Tri-State Flip Flop
74590	16	-	8-Bit binary counter, 3-state output register
74595	16	-	8-Bit Serial -> Parallel (SIPO) Shift Register

4000er Familie

Typen

Name	Pins	Anzahl	Logische Funktion
4000	14	2	3er NOR-Gatter und 1 Inverter
4001	14	4	NOR-Gatter mit 2 Eingängen
4002	14	2	NOR-Gatter mit 4 Eingängen
4006	14	1	18 Bit statisches Schieberegister
4007	14	2	Komplementäreingänge und Inverter
4008	16	1	4 Bit Volladdierer mit Parallelübertragausgang
4009	16	6	Inverter / Puffer
4010	16	6	Puffer
4011	14	4	NAND-Gatter mit 2 Eingängen
4012	14	2	NAND-Gatter mit 4 Eingängen
4013	14	2	D-Flipflop mit Set/Reset-Eingang
4014	16	4	8 Bit statisches Schieberegister mit Synchron-Parallel-Serienausgang
4015	16	2	4 Bit statisches Schieberegister mit Synchron-Parallel-Serienausgang
4016	14	4	Bilateralere Analog-Schalter
4017	16	1	Dekadenzähler mit 10 dekodierten Dezimalausgängen
4018	16	1	Programmierbarer 1/n-Teiler
4019	16	4	AND/OR-Kombinationsgatter
4020	16	1	14 Bit Binärzähler/Frequenzteiler
4021	16	1	8 Bit statisches schieberegister
4022	16	1	Zähler/Teiler mit 8fachem Teilerverhältnis und 8 dekodierten Dezimalausgängen
4023	14	3	NAND-Gatter mit 3 Eingängen
4024	14	1	7 Bit Binärzähler / Frequenzteiler
4025	14	3	NOR-Gatter mit 3 Eingängen
4026	16	1	Dezimalzähler mit 7-Segment-Decoder
4027	16	2	JK-Flipflop mit Set / Reset-Eingang
4028	16	1	BCD / Dezimal-Decoder
4029	16	1	Programmierbarer 4 Bit vorwärtz / Rückwärts Zahler
4030	14	4	Exclusiv-OR-Gatter
4031	16	1	64 Bit statisches Schieberegister
4032	16	2	Serienaddierer (positiv)
4033	16	1	Programmierbarer Dezimalzähler mit 7-Segment-Decoder
4035	16	1	Statisches 4 Bit Schieberegister
4036	24	4	4 Bit statisches Schieberegister mit Synchron-Parallel-Serienausgang
4037	14	3	AND / OR Zweiphasenpaar
4038	16	3	Serieller Addierer (negativ)
4039	24	4	8 Bit Speicher Register
4040	16	1	12 Bit Binärzähler / Frequenzteiler
4041	14	4	Tune / Complement-Buffer
4042	16	4	Latch
4043	16	4	NOR-RS Latch
4044	16	4	NAND-RS Latch
4045	16	1	21 stufiger zähler/Frequenzteiler
4046	16	1	PLL-Schaltkreis
4047	14	1	Monostabiler / astabiler Multivibrator
4048	16	1	Multifunktionsgatter mit 8 Eingängen
4049	16	6	Pegelkonverter invertiert
4050	16	6	Pegelkonverter
4051	16	1	8 Knanal Multiplexer / Demultiplexer
4052	16	1	4 Knanal Differenz Multiplexer / Demultiplexer
4053	16	3	2 Kanal Multiplexer / Demultiplexer
4054	16	1	4-segment Flüssigkristall-Treiber
4055	16	1	BCD / 7-Segment Decoder für Multiplex
4056	16	1	BCD / 7-Segment Decoder mit Latch
4057	28	1	4 Bit LSI-Arithmetik-Einheit
4059	16	1	Programmierbarer Zähler / Teiler
4060	16	1	14 stufiger Zähler / Teiler / Oszillator
4061	16	1	Vollkodiertes 256x1 Bit Ram
4062	16	1	Dynamisches 200-Stufenregister
4063	16	1	4 Bit Größen-Komperator (Vergleicher)
4066	14	4	Bilaterale Schalter
4067	24	1	16 Kanal Multiplexer / Demultiplexer
4068	14	1	NAND-Gatter mit 8 Eingängen
4069	14	6	Inverter
4070	14	4	Exclusiv-OR-Gatter
4071	14	4	OR-Gatter mit 2 Eingängen
4073	14	3	AND-Gatter mit 3 Eingängen
4075	14	3	OR-Gatter mit 3 Eingängen
4076	16	4	D-Latches
4077	14	4	Exclusiv-NOR-Gatter
4078	14	1	NOR-Gatter mit 8 Eingängen
4081	14	4	AND-Gatter mit 2 Eingängen
4082	14	2	AND-Gatter mit 4 Eingängen
4085	14	4	AND / OR-Gatter mit 2 Eingängen
4086	14	4	Expander AND / OR-Inverter-gatter mit 2 Eingängen
4089	16	1	Binärer Multiplizierer
4093	14	1	NAND Schmitt-Trigger mit 2 Eingängen
4094	16	1	8 Bit Universal-Busregister
4095	14	1	J-K-Master-Slave Flipflop
4096	14	1	J-K-Master-Slave Flipflop
4097	24	1	8 Kanal Multiplexer / Demultiplexer
4098	16	2	Monostabile Multivibratoren
4099	16	1	8 Bit addressiertes Latch

4500er Familie

Typen

Name	Pins	Anzahl	Logische Funktion
4501	16	1	24 stufiger Frequenzteiler
4502	16	6	Puffer mit 3-State-Ausgängen
4503	16	6	Puffer mit 3-State-Ausgängen
4504	16	6	TTL / CMOS-Pegelkonverter
4505	14	1	64x1 Bit statisches RAM
4506	14	2	AND / OR-Gatter, erweiterbar
4508	24	2	4 Bit Latches
4510	16	1	BCD vorwärts / rückwärts Zähler
4511	16	1	BCD 7 7-Segment-Latch, Decoder, Treiber
4512	16	1	8-Kanal Datenselektor
4513	18	1	BCD / 7-Segment-Decoder / Speicher /LED-Treiber
4514	24	1	4 / 16-Demultiplexer mit Latch
4515	16	1	4 / 16-Demultiplexer mit Latch
4516	16	1	4 Bit vorwärts / rückwärts-Zähler
4517	16	2	4 Bit vorwärts / rückwärts-Zähler
4518	16	2	BCD Vorwärtszähler
4519	16	1	4 Bit AND / OR-Selector
4520	16	1	2fach Binär Vorwärtszähler
4521	16	1	24 stufiger Frequenzteiler
4522	16	1	Programmierbarer 4 Bit-Binärzähler
4526	16	1	Synchroner programmierbarer 4 Bit-Binärzähler
4527	16	1	BCD Multiplizierer
4528	16	2	Monostabiler Multivibrator
4529	16	2	2-Kanal Analog-Multiplexer
4530	16	2	Majoritätslogik-Gatter, 5 Eingänge
4531	16	1	12 Bit-Prioritätsencoder
4532	16	1	8 Bit-Prioritätsencoder
4534	24	1	5-stelliger Echtzeitszähler
4536	16	2	programmierbarer Zeitgeber
4538	16	2	monostabiler Präzisions-Multivibrator
4539	16	2	4- zu 1-Multiplexer
4541	14	1	programmierbarer Oszillator / Zeitgeber
4543	16	1	BCD / 7-Segment Latch, Decoder, Treiber
4547	16	1	7-Segment-Decoder, Leistungstreiber
4548	16	2	retriggerbare Monoflops
4549	16	1	8 Bit Register / A/D-Wandler
4551	16	4	2-Kanal Analog Multiplexer
4553	16	1	3-stelliger BCD-Zähler
4554	16	2	2 Bit parallell Multiplexer
4555	16	2	2- zu 4-Demultiplexer
4556	16	2	2- zu 4-Demultiplexer
4557	16	1	Schieberegister mit 1 bis 64 Bit
4558	16	1	BCD zu 7-Segment Dekoder
4559	16	1	8-Bit Register in A/D wandeln
4560	16	1	4 Bit BCD-Addierer
4561	14	1	9er Komplementierer
4562	14	1	128 Bit Schieberegister parallel
4566	16	1	Zeitbasis-Generator
4568	16	1	Phasenkomperator und Zähler mit Preset
4569	16	2	schnelle 4 Bit Rückwärtszähler
4572	16	4	Inverter, 1 Nor, 1 Nand, 2 Eingänge
4580	24	1	4x4 Bit Multiport-Register
4581	24	1	4 Bit arithmetische / logische Einheit
4582	16	1	Einheit zur Übertragsbildung
4583	16	2	Schmitt-Trigger mit Hysterese
4584	14	6	invertierende Schmitt-Trigger
4585	16	1	4 Bit Vergleicher
4597	16	1	8 Bit D-Latch, Zähler, buskompatibel
4598	16	1	8 Bit D-Latch adressierbar, buskompatibel
4599	18	1	8 Bit adressierbares D-Latch

Definitionen

Strom

ICC	Quiescent power supply current; the current flowing into the VCC supply terminal.
D ICC	Additional quiescent supply current per input pin at a specified input voltage and VCC
IGND	Quiescent power supply current; the current flowing into the GND terminal.
II	Input leakage current; the current flowing into a device at a specified input voltage and VCC.
IIK	Input diode current; the current flowing into a device at a specified input voltage.
IO	Output source or sink current; the current flowing into a device at a specified output voltage.
IOK	Output diode current; the current flowing into a device at a specified output voltage.
IOZ	OFF-state output current; the leakage current flowing into the output of a 3-state device in the OFF-state, when the output is connected to VCC or GND.
IS	Analog switch leakage current; the current flowing into an analog switch at a specified voltage across the switch and VCC.

Spannung

GND	Supply voltage; for a device with a single negative power supply, the most negative power supply, used as the reference level for other voltages; typically ground.
VCC	Supply voltage; the most positive potential on the device.
VEE	Supply voltage; one of two (GND and VEE) negative power supplies.
VH	Hysteresis voltage; difference between the trigger levels, when applying a positive and a negative-going input signal.
VIH	HIGH level input voltage; the range of input voltages that represents a logic HIGH level in the system.
VIL	LOW level input voltage; the range of input voltages that represents a logic LOW level in the system.
VOH	HIGH level output voltage; the range of voltages at an output terminal with a specified output loading and supply voltage. Device inputs are conditioned to establish a HIGH level at the output.
VOL	LOW level output voltage; the range of voltages at an output terminal with a specified output loading and supply voltage. Device inputs are conditioned to establish a LOW level at the output.
VT+	Trigger threshold voltage; positive-going signal.
VT-	Trigger threshold voltage; negative-going signal.

Analog

RON	ON-resistance; the effective ON-state resistance of an analog switch, at a specified voltage across the switch and output load.
D RON	D ON-resistance; the difference in ON-resistance between any two switches of an analog device at a specified voltage across the switch and output load.

Kapazitäten

CI	Input capacitance; the capacitance measured at a terminal connected to an input of a device.
CI/O	Input/Output capacitance; the capacitance measured at a terminal connected to an I/O-pin(e.g. a transceiver).
CL	Output load capacitance; the capacitance connected to an output terminal including jig and probe capacitance.
CPD	Power dissipation capacitance; the capacitance used to determine the dynamic power dissipation per logic function, when no extra load is provided to the device.
CS	Switch capacitance; the capacitance of a terminal to a switch of an analog device.

Parameter

fi	Input frequency; for combinatorial logic devices the maximum number of inputs and outputs switching in accordance with the device function table. For sequential logic devices the clock frequency using alternate HIGH and LOW for data input or using the toggle mode, whichever is applicable.
fo	Output frequency; each output.
fmax	Maximum clock frequency; clock input waveforms should have a 50 % duty factor and such as to cause the outputs to be switching from 10 % VCC to 90 % VCC in accordance with the device function table.
th	Hold time; he interval immediately following the active transition of the timing pulse (usually the clock pulse) or following the transition of the control input to its latching level, during which interval the data to be recognized must be maintained at the input to ensure their continued recognition. A negative hold time indicates that the correct logic level may be released prior to the timing pulse and still be recognized.
tr, tf	Clock input rise and fall times; 10 % and 90 % values.
tPHL	Propagation delay; the time between the specified reference points, normally the 50 % points for 74HC and 74 HCU devices on the input and output waveforms and the 1.3 V points for the 74HCT devices, with the output changing from the defined HIGH level to the defined LOW level.
tPLH	Propagation delay; the time between the specified reference points, normally the 50 % points for 74HC and 74 HCU devices on the input and output waveforms and the 1.3 V points for the 74HCT devices, with the output changing from the defined LOW level to the defined HIGH level.
tPHZ	3-state output disable time; the time between the specified reference points, normally the 50 % points for 74HC and 74 HCU devices and the 1.3 V points for the 74HCT devices on the output enable input voltage waveform and a point representing 10 % of the output swing on the output voltage waveform of a 3-state device, with the output changing from a HIGH level (VOH) to a high impedance OFF-state (Z).
tPLZ	3-state output disable time; the time between the specified reference points, normally the 50 % points for 74HC devices and the 1.3 V points for the 74HCT devices on the output enable input voltage waveform and a point representing 10 % of the output swing on the output voltage waveform of a 3-state device, with the output changing from a LOW level (VOL) to a high impedance OFF-state (Z).
tPZH	3-state output enable time; the time between the specified reference points, normally the 50 % points for 74HC devices and the 1.3 V points for the 74HCT devices on the output enable input voltage waveform and the 50 % point on the output voltage waveform of a 3-state device, with the output changing from a high impedance OFF-state (Z) to a HIGH level (VOH).
tPZL	3-state output enable time; the time between the specified reference points, normally the 50 % points for 74HC devices and the 1.3 V points for the 74HCT devices on the output enable input voltage waveform and the 50 % point on the output voltage waveform of a 3-state device, with the output changing from a high impedance OFF-state (Z) to a LOW level (VOL).
trem	Removal time; the time between the end of an overriding asynchronous input, typically a clear or reset input, and the earliest permissible beginning of a synchronous control input, typically a clock input, normally measured at the 50 % points for 74HC devices and the 1.3 V points for the 74HCT devices on both input voltage waveforms.
tsu	Set-up time; the interval immediately preceding the active transition of the timing pulse (usually the clock pulse) or preceding the transition of the control input to its latching level, during which interval the data to be recognized must be maintained at the input to ensure their recognition. A negative set-up time indicates that the correct logic level may be initiated sometime after the active transition of the timing pulse and still be recognized.
tTHL	Output transition time; the time between the two specified reference points on a waveform, normally 90 % and 10 % points, that is changing from HIGH-to-LOW.
tTHL	Output transition time; the time between the two specified reference points on a waveform, normally 90 % and 10 % points, that is changing from LOW-to-HIGH.
tW	Pulse width; the time between the 50 % amplitude points on the leading and trailing edges of a pulse for 74HC and 74HCU devices and at the 1.3 V points for 74HCT devices.

Weblinks

• datasheetcatalog.net Datasheet-Quelle für elektronische Bauelemente und Halbleiter
• alldatasheet Electronic Component's Datasheet
• University of Kentucky TTL Databook